Prof. Xiaoteng Zhao | Wireline Communication | Excellence in Research Award

Professor | Xidian University | China

Professor Xiaoteng Zhao of Xidian University is a leading expert in high-speed data interfaces and chiplet interconnects, recognized for advancing integrated circuit design in next-generation wireline communication systems. He holds advanced degrees in microelectronics and integrated circuit engineering with specialization in high-speed mixed-signal architectures, and his professional experience includes serving as principal investigator for major national research initiatives, directing innovations in reconfigurable chiplet interconnects, multi-level high-speed receivers, and energy-efficient communication circuits. He has led teams in developing record-breaking transceiver designs and contributed extensively to the field through influential publications in premier IEEE venues such as ISSCC, JSSC, CICC, and RFIC. His research spans CDR systems, PLL architectures, frequency dividers, multi-mode EOMs, analog front-end techniques, and wireline link optimization, supported by more than twenty patents and impactful collaborative projects. His achievements have earned multiple honors, including best paper recognition and national-level commendation for semiconductor research advancements. In addition to his technical contributions, he has served on editorial boards, participated in IEEE standardization efforts, taken on TPC roles, and maintained active membership in professional engineering societies, reinforcing his leadership and service to the microelectronics community. Quote 257, h-index 9, i10-index 8.

Profile: Google Scholar

Featured Publications

X. Zhao, Y. Dong, Y. Zhang, H. Chang, Y. Qi, Z. Yang, C. Han, H. Liang, Y. Yu, A Full-Rate 8.2-to-15.1-Gb/s Reference-Less CDR using Low-Cost SAR-Based Frequency Acquisition Technique Achieving 265 ns Acquisition Time. Microelectronics Journal, 106944, 2025.

Z. Yang, X. Zhao, H. Sun, X. Su, Z. Dong, Y. Dong, Y. Yu, H. Liang, S. Liu, A 56 Gb/s PAM4 slope-sampling CDR with simultaneous four-output phase interpolator. Microelectronics Journal, 106870, 2025.

J. Liu, X. Su, Z. Yang, Z. Dong, C. Han, X. Zhao, S. Liu, A 7-bit 8 GHz Phase Interpolator With Eight-Phase Output Using a Linear Weighting Scheme Using Only 50% Interpolation Units. Microelectronics Journal, 106874, 2025.

M. Zhang, R. Li, X. Zhao, X. Su, Z. Dong, Z. Yang, H. Su, H. Liang, Y. Yu, S. Liu, Load-Driven Inductive Peaking Design for Broad Band Continuous-Time Linear Equalizer. Microelectronics Journal, 106873, 2025.

Z. Dong, X. Zhao, Z. Yang, X. Su, H. Han, F. Bu, D. Sun, S. Liu, Z. Zhu, A 0.0006-mm² 0.13-pJ/bit 9–21-Gb/s Sub-Sampling CDR with Inverter-Based Frequency Multiplier and Embedded 1:3 DEMUX in 65-nm CMOS. IEEE J. Solid-State Circuits, 2025.

Mrs. Ricky Rajora | VLSI & Microelectronics Design | Best Researcher Award

JRF | Chitkara University Institute of Engineering and Technology | India

Ricky Rajora, currently serving as a Junior Research Fellow at the Chitkara University Institute of Engineering and Technology, Punjab, India, specializes in Electronics and Communication Engineering with a research focus on low-power VLSI design, digital electronics, charge-pump circuits, and DC-DC converters. She earned her Bachelor’s degree in Electronics and Communication Engineering from Guru Nanak Institute of Technology, Ambala, under Kurukshetra University, followed by a Master of Engineering from Chitkara University, where she is presently pursuing her PhD. Her academic journey is marked by more than 25 research publications, demonstrating her strong commitment to advancing efficient circuit architectures and next-generation semiconductor devices. Ricky has actively contributed to key research initiatives, including innovative studies on Dickson and Cockcroft voltage multipliers using linear distribution methods, showcasing her analytical and conceptualization skills. Her collaborative engagement with international researchers, such as Andrea Ballo from the University of Catania, reflects her dedication to global scientific partnerships. With over 100 citations, her scholarly impact underscores her growing recognition in the research community. Ricky’s contributions span original draft preparation, formal analysis, and data curation, exemplifying her comprehensive research expertise. Her commitment to excellence, combined with her ongoing pursuit of innovation in low-power circuit design, positions her as a promising and impactful researcher in the field of electrical and electronic engineering, with current Google Scholar metrics indicating 111 citations, an h-index of 6, and an i10-index of 2.

Profile: Google Scholar

Featured Publications

Ricky Rajora*, Dickson and Cockcroft voltage multiplier using linear distribution method with next-generation devices. J. Low Power Electron. Appl., Accepted.

Ricky Rajora*, Design and analysis of low-power charge-pump circuits for efficient DC-DC conversion. Microelectron. J., 2024, 8(3), 104215.

Ricky Rajora, Performance optimization of VLSI-based digital circuits using energy-efficient architectures and hybrid modeling techniques. Int. J. Electron. Commun., 2024, 9(2), 118032.